Hardware jobs @ Infosys

System DesignFront End Design + Verification (DV): Verilog, HVLs (Specman, System Verilog), Methodology (VMM / OVM / eRM / UVM) 

Physical Design (PD) I Synthesis I STA: RTL-GDSII design (Block & Full Chip) 40 nm, 32 nm, 28 nm, 22 nm 

Analog Custom Design: Circuit design, SPICE simulation, Layout design & verification 
DFT: SCAN, ATPG, MBIST, LBIST, BSCAN, Analog and Mixed Signal, BISTs, JTAG 1149.1/1149.6

System Design (SD): High-speed Board design expertise on Schematic Entry, SI analysis, value engineering and analysis for telecom and wireless domains (BT, LTE, WI-Fl) 
Emulation I FPGA Design: Fxpertise nn Traditinnal FPGA / Palladium / Zebu / Veloce Emulation platforms

IT Engineers
Location: Chandigarh 
Level: Junior - Executive, Assistant 
Required Experience: 2 to 12 years
Job description: Infosys is looking for engineers who hold a BE / BTeth / MCA I ME I MTeth degree from a premier institute with 2 - 12 years of relevant experience, across the areas and technologies mentioned below.

How to apply: Interested candidates careers_hrd@infosys.com Candidates who wish to re-apply can do so after 9 months of their previous application. To know more about Infosys Engineering Services, visit Click here

For more details Click here

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